Space missions, such as NASA’s Orion mission that will take astronauts to Mars, are pushing the boundaries of human exploration. But as they transit, the spacecraft encounter a constant stream of harmful cosmic radiation, which can damage or destroy the electronics on board. One possibility is to include carbon nanotubes in widely used electronic components, such as field-effect transistors.
Single atom tubes are expected to make these transistors more energy efficient than silicon-based versions. In principle, the ultra-small size of the nanotubes should also help reduce the effects that radiation would have when colliding with memory chips containing these materials. However, the radiation tolerance of carbon nanotube field-effect transistors has not been extensively studied. Hence, Pritpal Kanhaiya, Max Shulaker and their colleagues study and design this type of field-effect transistor to withstand high levels of radiation to build memory chips based on these transistors.
To do this, the researchers deposited carbon nanotubes on a silicon wafer as a semiconducting layer in field-effect transistors. Next, they tested different transistor configurations with varying levels of shielding, consisting of thin layers of hafnium oxide, titanium and the metallic platinum, around the semiconductor layer.
The team found that placing the shields above and below the carbon nanotubes shielded the electrical properties of the transistor from incoming radiation up to 10mrad, a much higher level than most radiation-tolerant silicon-based electronic devices. These results indicate that carbon nanotube field-effect transistors, especially those with dual shielding, could be a promising addition to the next generation of electronics for space exploration.
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